P V S Rao
Articles written in Proceedings – Section A
Volume 46 Issue 5 November 1957 pp 354-359
The speed of operation of double rank counters can be increased by a suitable modification of the gating logic now being used. The improvement in speed, predicted on theoretical grounds, has been experimentally verified. The prescribed logic enables the use of both the ranks of the counter to advantage, one rank counting in the normal, and the other in the reverse fashion.
Volume 57 Issue 3 March 1963 pp 121-134
A system in which the output of a digital computer is displayed as an arbitrary character on a memotron tube is described. Two sequences of pulses, each consisting of 25 pulses equally spaced in time, each either positive or negative, and all of equal magnitude, are applied to X and Y counters. Each pulse either increases or decreases the contents of the counters by one. The digital data in each counter are then converted to analog data which is applied to the deflection plates of the tube. Eight types of basic lines are traced on the screen and the characters are built out of these basic lines by continuously tracing them one after another in the proper sequence. Details of linking the system with an existing computer are described. Some advantages of the system are: (
Volume 61 Issue 5 May 1965 pp 319-321
Straightforward amplitude threshold read-out systems fail at low packing densities in non-return-to-zero recording systems. Several elaborate systems have been designed as a remedy. The present circuit is a very much simplified version which operates satisfactorily, using the regenerative action within a flip-flop to detect the change in current polarity occurring at the peak in a voltage differentiator.
Volume 66 Issue 3 September 1967 pp 144-152
This paper describes an