• B K Basu

      Articles written in Proceedings – Section A

    • The input and output system of the T.I.F.R. computer

      B K Basu K Bakhru

      More Details Abstract Fulltext PDF

      This paper describes the logical circuits which have been incorporated in the Input-Outpur unit of a pilot electronic digital computer. The unit is used to feed the input data into the calculator from a punched tape through a Photo-electric tape reader and to print out the results, after computation, by standard teletype equipment.

    • A modified gating logic to improve the speed of operation of double rank counters

      B K Basu P V S Rao

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      The speed of operation of double rank counters can be increased by a suitable modification of the gating logic now being used. The improvement in speed, predicted on theoretical grounds, has been experimentally verified. The prescribed logic enables the use of both the ranks of the counter to advantage, one rank counting in the normal, and the other in the reverse fashion.

    • On the logical and circuit design of the digital computer at T.I.F.R., Bombay

      B K Basu S P Srivastava

      More Details Abstract Fulltext PDF

      The T.I.F.R. computer is a parallel, binary, asynchronous single address machine. The arithmetic unit consists of a Memory Register, two (double rank) shift registers, the Accumulator and the M.Q. Register respectively, an Adder and a pair of True/Complement gates. A carry bypass logic is described which reduces the maximum carry delay time by a factor of 1/3. The maximum carry delay time for 40 bits is 3 μ sec. The clear and gate drivers for the Registers and the driver (+40 V/−30 V) for True/Complement gating are of self-regulating type and their design and operation are dealt with in detail. The Add-Shift sequencing unit is described as a typical example of the control logic design. Other sequencing units perform their micro operations in exactly similar fashion. Schematic diagram of the fast access ferrite core memory (access time 15μ sec.) and some of the associated circuits are described.

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