• D VINOD KUMAR

      Articles written in Sadhana

    • Energy-efficient, high-performance and memory efficient FIR adaptive filter architecture of wireless sensor networks for IoT applications

      J CHARLES RAJESH KUMAR D VINOD KUMAR

      More Details Abstract Fulltext PDF

      Noise contaminates and distorts measurements from wireless sensor networks (WSNs). The sensor node’s computations and energy consumption are increased due to the noise in the signal, resulting in the sensor node’s shorter lifespan. Therefore, efficient design is required to achieve noise reduction. The finite impulse response (FIR) filter is a significant part of signal preprocessing in the WSN to remove noise. Signal preprocessing could assist in minimizing the amount of energy used in communication between nodes while also improving data transmission efficiency. The multiplier block in an FIR filter involves the generation and addition of partial products (PP), which consumes a large area and enormous power. The most common adaptive filtering technique utilizes the least mean squares (LMS) algorithms. The multiply and accumulate (MAC)process is the spine of LMS adaptive filters. Using multiple MAC units can boost the system’s speed, but the cost of the system rises as the multipliers take up a lot of space and consume more energy. When LMS is implemented as a completely reliable architecture on a hardware platform, the multiplier evolves into a bottleneck for higher-order filters, resulting in significant size, expenditure, and energy needs, rendering the design unsuitable for practical implementation. FIR filters are frequently realized using distributed arithmetic (DA) based scheme. DA-based designs replace multipliers with look-up tables (LUT), where the precomputed PPs is saved. LUTs are required for weight update and filtering processes. The size of the LUT rises exponentially with the increasing order of filters. To minimize the size of a LUT, offset binary coding (OBC) is utilized, resulting in smaller memory size. The proposed architecture is based on DA in which PPs of filter coefficients are precalculated, and these coefficients are saved in LUTs, and through the use of OBC, the weighted coefficients areupdated. The proposed method does not decompose the LUT into two smaller LUT to achieve area and energy efficiency. Typically, each iteration requires recalculating all of the LUT’s address locations. This research presents a novel method that iteratively updates the contents of LUT without rotating the address, making the FIR filter more energy efficient. Random access memory-based LUT is utilized to eliminate the physical address rotation. A method for reducing LUT access time is proposed. The proposed design significantly reduces areaand energy consumption compared to the existing systems. Also, it saves a large amount of sliced LUT and flipflops compared to conventional methods. Therefore, high-performance adaptive filtering applications like IoTbased WSN can benefit the most from the suggested approach.

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