Articles written in Pramana – Journal of Physics

    • Impact of gate-on-drain overlap on the electrical characteristics of TFETs: Role of oxide material and drain spacer


      More Details Abstract Fulltext PDF

      In the current study, the gate overlap on the drain side was investigated from the prospects of both DC and high-frequency behaviour. The key parameters extracted in this work to determine the main performance parameters are subthreshold swing (SS), ambipolar current (I$_{amb}$), ON/OFF current ratio and cut-off frequency. Although the gate overlap on the drain decreases the ambipolar current, it has an adverse effect on the high-frequency performance as the gate-to-drain capacitance increases. This behaviour is observed for increasing overlap length for low-k gate oxide. On the other hand, the ambipolar current does not show a considerable decline when using high-k gate oxide. To obtain a low ambipolar current at lower values of equivalent oxide thickness (EOT), we propose a low-k dielectric spacer above the drain side. The low-k spacer not only decreases the gate-to-drain capacitance butalso facilitates the suppression of ambipolarity due to overlap. All simulations carried out in this work are done using the Silvaco TCAD device simulator.

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