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RAJAT KUMAR SINGH
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Volume 41 Issue 4 August 2018 Article ID 0101
PRASHANT SINGH RAJESH KUMAR JHA RAJAT KUMAR SINGH B R SINGH
In this article, we report the structural and electrical properties of metal–ferroelectric–high k dielectric–silicon (MFeIS) gate stack for non-volatile memory applications. Thin film of sputtered SrBi$_2$Nb$_2$O$_9$ (SBN) was used as ferroelectric material on 5–15 nm thick high-k dielectric (Al$_2$O$_3$) buffer layer deposited using plasma-enhanced atomic layer deposition (PEALD). The effect of annealing on structural and electrical properties of SBN and Al$_2$O$_3$ films was investigated in the temperature range of 350–1000$^{\circ}$C. X-ray diffraction results of the SBN and Al$_2$O$_3$ show multiple phase changes with an increase in the annealing temperature. Multiple angle ellipsometry data show the change in the refractive index ($n$) of SBNfilm from 2.0941 to 2.1804 for non-annealed to samples annealed at 600$^{\circ}C. For Al$_2$O$_3$ film, $n$ < 1.7 in the case of PEALDand $n$ > 1.7 for sputtered film was observed. The leakage current density in MFeIS structure was observed to two orders of magnitude lower than metal/ferroelectric/silicon (MFeS) structures. Capacitance–voltage (C–V) characteristics for the voltage sweep of $−$10 to 10 V in dual mode show the maximum memory window of 1.977 V in MFeS structure, 2.88 Vwith sputtered Al$_2$O$_3$ and 2.957 V with PEALD Al$_2$O$_3$ in the MFeIS structures at the annealing temperature of 500$^{\circ}$C.
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