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    • Keywords


      Single-phase inverter; grid synchronization; orthogonal signal generation; phase locked loop; unit vector; DC-offset.

    • Abstract


      Grid synchronization is the most essential component involved in the operation and control coordination of grid connected inverters. Variations in the grid frequency, phase sequence and harmonic distortions in the grid voltage are considered as the prime factors that adversely affect the smooth functioning of the grid connected inverters. Hence, numerous PLL based synchronization strategies are developed for the single-phase inverters. However, these methods are highly complex, frequency dependent, nonlinear in nature and show poorfiltering performance. Thus, this research work aims to develop a novel synchronization technique for directly generating the unit vector from the input signal without any additional requirements such as phase detector andthe oscillator. This paper mainly focusing on evaluating the dynamic performance of the proposed technique under distorted grid conditions and comparing its performance with the investigational fallouts reported in recenttimes. During this analysis, the conventional PLL techniques such as pPLL, Park-PLL, EPLL, and DFAC-PLL are considered for the comparison. For evaluating the results, both the MATLAB/Simulink based simulation analysis and the hardware experimentation analysis have been conducted in this work. The specific outcomes obtained through the simulation and experimental analysis depicts the superior performance of the proposed synchronization technique.

    • Author Affiliations



      1. Power Electronics Group, Centre for Development of Advanced Computing, Thiruvananthapuram 695033, India
      2. Department of Electrical and Electronics Engineering, National Institute of Technology, Tiruchirappalli 620015, India
    • Dates

  • Sadhana | News

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