In this paper a novel desktop cosmic radiation emulator to assess the effectiveness of mitigation towards single event upsets (SEUs) during the design phase is discussed. The GA based closed loop perturbation controller approach is implemented to generate the worst-case failure. Methodology to identify and embed the fault injection feature to emulate the SEUs during the design phase is explained using the avionics SoC as case study. Traditional radiation chamber testing setups are major establishments which are also very expensive, onlyavailable as central facilities and involve lengthy procedure for usage. A major objective was to have an inhouse radiation testing equipment in view of the increasing work-load and faster turn-around-time expected for the testing and test results during the design phase itself. The emulator fault injection perturbation controller is realized in Xilinx XC5VFX130T FPGA and 64GB RAM, 64-bit operating system 3.1GHz processor-based workstation for configuration and storage. The DUT module is a generic avionics architecture realized in XilinxXC6VLX240T-1 FPGA. During the emulation using the manually generated fault injection nodes 31% of DUT functions failed and results differed with the functional outputs. For the same functional scenario using the GA based fault injection nodes 64% of the DUT functions failed and results differed with the functional outputs exhibiting the worst failure. The additional failure scenarios captured during the design phase using the GA based desktop method enhances the designer confidence and improves the reliability of the DUT.