• Experimental validation of waveform relaxation technique for power system controller testing

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      https://www.ias.ac.in/article/fulltext/sadh/040/01/0089-0106

    • Keywords

       

      Power systemcontrollers; controller testing; hardware in loop simulation; waveform relaxation method.

    • Abstract

       

      A Waveform Relaxation (WR) based iterative real-time playback scheme for controller testing was recently proposed in the literature along with proof-ofconcept simulations. This scheme can be a low-cost alternative to Hardware-in-Loop simulation, as it does not require a real-time simulator. To demonstrate practical feasibility of the WR scheme, this paper presents results of experiments with real-time implementation of controllers, iteratively interacting with simulated models of power apparatus via storage and real-time play-back. Two systems are considered: a HVDC controller tested with a detailed model of the converters, and a TCSC based damping controller tested with a low frequency model of a power system. The results are validated with those obtained using simulated models of the controllers. We also present results of an experiment in which the tested HVDC controller is used to control the scaled real-life HVDC apparatus, for which a simulated model was used during controller testing. Convergence and a good match between simulated and real-time implementation are obtained for the HVDC system. The experiments on the TCSC damping controller drawn our attention to a potential convergence problem which may arise due to iteration-dependent round-off noise.

    • Author Affiliations

       

      S P Panda1 K A Salunkhe1 A M Kulkarni1

      1. Department of Electrical Engineering, Indian Institute of Technology, Mumbai 400 076, India
    • Dates

       
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