Mismatch of dielectric constants at the interface of nanometer metal-oxide-semiconductor devices with high-𝐾 gate dielectric impacts on the inversion charge density
The comparison of the inversion electron density between a nanometer metal-oxidesemiconductor (MOS) device with high-𝐾 gate dielectric and a SiO2 MOS device with the same equivalent oxide thickness has been discussed. A fully self-consistent solution of the coupled Schrödinger–Poisson equations demonstrates that a larger dielectric-constant mismatch between the gate dielectric and silicon substrate can reduce electron density in the channel of a MOS device under inversion bias. Such a reduction in inversion electron density of the channel will increase with increase in gate voltage. A reduction in the charge density implies a reduction in the inversion electron density in the channel of a MOS device. It also implies that a larger dielectric constant of the gate dielectric might result in a reduction in the source–drain current and the gate leakage current.
Volume 96, 2022
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