The Linear Collider Flavour Identification (LCFI) collaboration is continuing the work to develop column-parallel CCDs (CPCCD) and CMOS readout chips to be used in the vertex detector at the international linear collider (ILC). The CPCCD achieves several orders of magnitude faster readout than conventional CCDs because every column is equipped with amplifier and ADC, enabling efficient data taking with low occupancy. Already two generations of CPCCDs and readout chips have been manufactured and the first chips have been fully tested. The second generation devices are now being evaluated. A new CCD-based device, the in-situ storage image sensor (ISIS) has also been developed. The ISIS offers numerous advantages in terms of relaxed readout, increased radiation hardness and great immunity to EMI. In this paper we present the results from the tests of the CPCCDs, readout chips and ISIS, as well as the plans for future developments.